For a general flash type nonvolatile memory, presently, a way to recognize the memory state is the application of applying a reading voltage Vread on the gate, which the reading voltage was set between the programming threshold voltage and erasing threshold voltage, with the corresponding currents induced by the reading voltage ones could recognize the memory state as “0” or “1”. The voltage difference between the programming and erasing threshold voltages (also referred as memory window) may have an effect on the probability of misrecognition of the memory state; the misrecognition of memory state could be avoided only in the case of a large scale memory window. Once the threshold voltage of the memory changes, the transistor is incapable of switching between ON and OFF properly, thus incapable of being used as a switch.
Conventionally, there are two primary ways to program the flash type nonvolatile memory: FN tunneling (Fowler-Nordheim tunneling) and channel-hot-electron programming, while the way to erase is mainly FN tunneling. Generally, the advantage of using channel-hot-electron to program SONOS memory is this could provide a two-bit memory effect, in which electrons are stored in the silicon nitride (Si3N4) layer adjacent above the source or drain, in such a way one single memory cell is allowed to store information at the source or the drain individually, thus achieving the two-bit effect. The disadvantage, however, is large power consumption required when the channel-hot-electron programming is carried out; the power consumption would be a significant problem if several memory cells are programmed at the same time. In addition, the memory may be deteriorated when it is programmed with channel-hot-electron, thus reducing reliability. As for FN tunneling programming, the advantage thereof is no necessity for large power consumption. However, the two-bit memory effect may be not achieved due to the fact that electrons will be injected into the silicon nitride layer over the whole channel after FN tunneling.
In view of the problems in the prior art and for solving them concurrently, the inventor proposes a method for enabling a SONOS transistor to be used as both a switch and a memory, on the basis of research and development for many years as well as much practice experience, used as the realizing way and basis to solve above problems.